Renesas RL78 Series User Manual page 197

16-bit single-chip microcontrollers

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Address: F0190H, F0191H (TMR00) to F019EH, F019FH (TMR07)

If both the edges are specified when the value of the STSmn2 to STSmn0 bits is other than 010B, set the CISmn1

to CISmn0 bits to 10B.

Note Bit 11 is a read-only bit and fixed to 0. Writing to this bit is ignored.

Remark m: Unit number (m = 0), n: Channel number (n = 0 to 7)

R01UH0515EJ0120 Rev.1.20

Dec 16, 2016

Figure 7-11. Format of Timer Mode Register mn (TMRmn) (3/4)

Falling edge

Both edges (when low-level width is measured)

Start trigger: Falling edge, Capture trigger: Rising edge

Both edges (when high-level width is measured)

Start trigger: Rising edge, Capture trigger: Falling edge

After reset: 0000H

Selection of TImn pin input valid edge

CHAPTER 7 TIMER ARRAY UNIT

Rl78/g1d R5f11agg R5f11agh R5f11agj