Renesas RL78 Series User Manual page 341

RL78/G1D
A/D voltage comparator
Software
trigger mode
Hardware trigger
no-wait mode
Hardware trigger
wait mode
Notes 1. While in the software trigger mode or hardware trigger no-wait mode, the time from the rising of the ADCE
bit to the falling of the ADCS bit must be 1 µs or longer to stabilize the internal circuit.
2. In starting conversion, the longer will take up to following time
ADM0
FR2 FR1 FR0
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
However, for the second and subsequent conversion in sequential conversion mode and for conversion of
the channel specified by scan 1, 2, and 3 in scan mode, the conversion start time and stabilization wait time
for A/D power supply do not occur after a hardware trigger is detected.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 12-4. Timing Chart When A/D Voltage Comparator Is Used
ADCE
Conversion
standby
ADCS
Note 1
Conversion
standby
ADCS
Note 1
1 is written
to ADCS.
Conversion
standby
ADCS
Hardware trigger
detection
Conversion Clock
(f )
AD
0 f /64
CLK
1 f /32
CLK
0 f /16
CLK
1 f /8
CLK
0 f /6
CLK
1 f /5
CLK
0 f /4
CLK
1 f /2
CLK
A/D voltage comparator: enables operation
Conversion start time
Conversion
operation
1 is written
0 is written to ADCS.
to ADCS.
Conversion start time
Trigger Conversion
standby operation
Hardware
trigger detection
0 is written to ADCS.
Conversion start time Note 2
A/D power supply stabilization wait time
Conversion
operation
0 is written to ADCS.
Cleared automatically upon completion of A/D conversion.
Conversion Start Time (Number of f
Software Trigger Mode/
Hardware Trigger No-wait Mode
63
31
15
7
5
4
3
1
CHAPTER 12 A/D CONVERTER
Note 2
Conversion Conversion
standby stopped
Note 2
Conversion
Conversion
standby
stopped
Conversion Conversion
standby stopped
Clock)
CLK
Hardware Trigger Wait Mode
1
320