Renesas RL78 Series User Manual page 713

16-bit single-chip microcontrollers
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RL78/G1D
(2) HALT mode release
The HALT mode can be released by the following two sources.
(a) Release by unmasked interrupt request
When an unmasked interrupt request is generated, the HALT mode is released. If interrupt acknowledgment is
enabled, vectored interrupt servicing is carried out. If interrupt acknowledgment is disabled, the next address
instruction is executed.
release signal
Status of CPU
High-speed system clock,
High-speed on-chip oscillator clock,
or subsystem clock
Notes 1. For details of the standby release signal, see Figure 18-1.
2. Wait time for HALT mode release
● When vectored interrupt servicing is carried out
Main system clock:
Subsystem clock (RTCLPC = 0): 10 to 11 clock
Subsystem clock (RTCLPC = 1): 11 to 12 clock
● When vectored interrupt servicing is not carried out
Main system clock:
Subsystem clock (RTCLPC = 0):
Subsystem clock (RTCLPC = 1):
Remark
The broken lines indicate the case when the interrupt request which has released the standby mode is
acknowledged.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 19-1. HALT Mode Release by Interrupt Request Generation
HALT
instruction
Standby
Note 1
Operating mode
CHAPTER 19 STANDBY FUNCTION
Interrupt
request
HALT mode
Oscillation
15 to 16 clock
9 to 10 clock
4 to 5 clock
5 to 6 clock
Note 2
Wait
Operating mode
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