Renesas RL78 Series User Manual page 586

RL78/G1D
A
STTn = 1
Wait
MSTSn = 1?
C
Note The wait time is calculated as follows.
(IICWLn setting value + IICWHn setting value + 4) × f
IICBSYn = 0?
D
STTn = 1
Wait
STCFn = 0?
Remarks 1. IICWLn: IICA low-level width setting register n
IICWHn: IICA high-level width setting register n
t :
F
f :
MCK
2. n = 0
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 14-29. Master Operation in Multi-Master System (2/3)
Enables reserving communication.
Prepares for starting communication
(generates a start condition).
Secure wait time
No
Yes
Wait state after stop condition
was detected and start condition
was generated by the communication
reservation function.
B
Disables reserving communication.
No
Yes
Prepares for starting communication
(generates a start condition).
Note
No
Yes
C
SDAAn and SCLAn signal falling times
IICA operation clock frequency
CHAPTER 14 SERIAL INTERFACE IICA
Note by software.
INTIICAn
interrupt occurs?
No
EXCn = 1 or COIn = 1?
Slave operation
+ t × 2 [clocks]
CLK F
INTIICAn
interrupt occurs?
EXCn = 1 or COIn = 1?
Slave operation
No
Waits for bus release
(communication being reserved).
Yes
Yes
No
Waits for bus release
Yes
No
Detects a stop condition.
Yes
D
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