Renesas RL78 Series User Manual page 431

16-bit single-chip microcontrollers
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RL78/G1D
Figure 13-31. Flowchart of Master Transmission (in Continuous Transmission Mode)
Write 1 to MDmn0 bit
Remark
<1> to <6> in the figure correspond to <1> to <6> in Figure 13-30
Transmission (in Continuous Transmission Mode).
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Starting setting
<1>
SAU default setting
Setting transmit data
Enables interrupt
Writing transmit data to
<2>
SIOp (=SDRmn[7:0])
Wait for transmit completes
<3>
<5>
Buffer empty/transfer end interrupt
Number of
communication data > 0?
Yes
Writing transmit data to
SIOp (=SDRmn[7:0])
Subtract -1 from number of
transmit data
RETI
No
Transmission completed?
Yes
Yes
Communication
continued?
No
Disable interrupt (MASK)
<6>
Write 1 to STmn bit
End of communication
CHAPTER 13 SERIAL ARRAY UNIT
For the initial setting, refer to Figure 13-24.
(Select buffer empty interrupt)
Set data for transmission and the number of data. Clear communication end flag
(Storage area, Transmission data pointer, Number of communication data and
Communication end flag are optionally set on the internal RAM by the software)
Clear interrupt request flag (XXIF), reset interrupt mask (XXMK) and set
interrupt enable (EI).
Read transmit data from storage area and write it
to SIOp. Update transmit data pointer.
When transfer end interrupt is generated, it moves to
interrupt processing routine.
If transmit data is left, read them from storage area then
write into SIOp, and update transmit data pointer and
No
number of transmit data.
If no more transmit data, clear MDmn bit if it's set. If not,
finish.
No
MDmn = 1?
Yes
<4>
Clear MDmn0 bit to 0
Check completion of transmission by
verifying transmit end flag
Writing to SIOp makes SOp
and SCKp signals out
(communication starts)
Sets communication
completion interrupt flag
Timing Chart of Master
410

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