Renesas RL78 Series User Manual page 469

16-bit single-chip microcontrollers
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RL78/G1D
13.5.6 Slave transmission/reception
Slave transmission/reception is that the RL78 microcontroller transmits/receives data to/from another device in the state
of a transfer clock being input from another device.
3-Wire Serial I/O
Target channel
Pins used
Note 3
Interrupt
Note 3
Error detection flag
Note 3
Transfer data length
Note 3
Transfer rate
Note 3
Data phase
Note 3
Clock phase
Note 3
Data direction
Notes 1. Because the external serial clock input to the SCK00 and SCK20 pins is sampled internally and used, the
fastest transfer rate is f
2. Use this operation within a range that satisfies the conditions above and the peripheral functions
characteristics in the electrical specifications (see CHAPTER 30 ELECTRICAL SPECIFICATIONS).
3. CSI21 cannot be used for slave transmission/reception.
Remarks 1.
f
: Operation clock frequency of target channel
MCK
f
: Serial clock frequency
CLK
2.
m: Unit number (m = 0, 1), n: Channel number (n = 0), mn = 00, 10
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
CSI00
Channel 0 of SAU0
SCK00, SI00, SO00
INTCSI00
Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer
mode) can be selected.
Overrun error detection flag (OVFmn) only
7 or 8 bits
Notes 1, 2
Max. f
/6 [Hz]
.
MCK
Selectable by the DAPmn bit of the SCRmn register
● DAPmn = 0: Data I/O starts from the start of the operation of the serial clock.
● DAPmn = 1: Data I/O starts half a clock before the start of the serial clock operation.
Selectable by the CKPmn bit of the SCRmn register
● CKPmn = 0: Non-reverse
● CKPmn = 1: Reverse
MSB or LSB first
/6 [Hz].
MCK
CHAPTER 13 SERIAL ARRAY UNIT
CSI20
Channel 0 of SAU1
SCK20, SI20, SO20
INTCSI20
CSI21
Channel 1 of SAU1
448

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