Renesas RL78 Series User Manual page 580

16-bit single-chip microcontrollers
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RL78/G1D
(Communication reservation)
Notes 1. The wait time is calculated as follows.
(IICWLn setting value + IICWHn setting value + 4)/f
2. The communication reservation operation executes a write to the IICA shift register n (IICAn) when a
stop condition interrupt request occurs.
Remarks 1. STTn: Bit 1 of IICA control register n0 (IICCTLn0)
MSTSn: Bit 7 of IICA status register n (IICSn)
IICAn: IICA shift register n
IICWLn: IICA low-level width setting register n
IICWHn: IICA high-level width setting register n
t
: SDAAn and SCLAn signal falling times
F
f
MCK
2. n = 0
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 14-27. Communication Reservation Protocol
DI
SET1 STTn
Define communication
reservation
Wait
Note 2
MSTSn = 0?
Yes
No
(Generate start condition)
Cancel communication
reservation
MOV IICAn, #××H
EI
: IICA operation clock frequency
CHAPTER 14 SERIAL INTERFACE IICA
Sets STTn flag (communication reservation)
Defines that communication reservation is in effect
(defines and sets user flag to any part of RAM)
Note 1
Secures wait time
by software.
Confirmation of communication reservation
Clear user flag
IICAn write operation
+ t
× 2
MCK
F
559

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