Renesas RL78 Series User Manual page 331

RL78/G1D
WINDOW1
0
0
1
1
<R> Note
WDCS2
0
0
0
0
1
1
1
1
Caution When bit 0 (WDSTBYON) of the option byte (000C0H) = 0, the window open period is 100%
Remark If the overflow time is set to 2
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Table 11-4. Setting Window Open Period of Watchdog Timer
WINDOW0
0 Setting prohibited
1 50%
Note
0 75%
1 100%
When the window open period is set to 75%, clearing the counter of the watchdog timer (writing ACH
to WDTE) must proceed outside the corresponding period from among those listed below, over which
clearing of the counter is prohibited (for example, confirming that the interval timer interrupt request
flag (WDTIIF) of the watchdog timer is set).
WDCS1 WDCS0
6
2 /f
0 0 IL
7
2 /f
0 1
IL
8
2 /f
1 0 IL
9
2 /f
1 1
IL
11
2 /f
0 0
13
2 /f
0 1
14
2 /f
1 0
16
2 /f
1 1
regardless of the values of the WINDOW1 and WINDOW0 bits.
Window close time 0 to 20.08 ms
Window open time 20.08 to 29.68 ms
<When window open period is 50%>
● Overflow time:
9 9
2 /f (MAX.) = 2 /17.25 kHz = 29.68 ms
IL
● Window close time:
9
0 to 2 /f (MIN.) × (1 – 0.5) = 0 to 2
IL
● Window open time:
9
2 /f (MIN.) × (1 – 0.5) to 2
IL
Window Open Period of Watchdog Timer
Watchdog timer overflow time
(f = 17.25 kHz (MAX.))
IL
(3.71 ms)
(7.42 ms)
(14.84 ms)
(29.68 ms)
(118.72 ms)
IL
(474.89 ms)
IL
(949.79 ms)
IL
(3799.18 ms)
IL
9
/f , the window close time and open time are as follows.
IL
Setting of Window Open Period
50%
0 to 10.04 ms
10.04 to 29.68 ms
9
/12.75 kHz × 0.5 = 0 to 20.08 ms
9 9
/f (MAX.) = 2 /12.75 kHz × 0.5 to 2
IL
CHAPTER 11 WATCHDOG TIMER
Period over which clearing the
counter is prohibited when the
window open period is set to 75%
1.85 ms to 2.51 ms
3.71 ms to 5.02 ms
7.42 ms to 10.04 ms
14.84 ms to 20.08 ms
56.36 ms to 80.32 ms
237.44 ms to 321.26 ms
474.89 ms to 642.51 ms
1899.59 ms to 2570.04 ms
75% 100%
None
0 to 29.68 ms
9
/17.25 kHz = 20.08 to 29.68 ms
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