Renesas RL78 Series User Manual page 809

16-bit single-chip microcontrollers
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RL78/G1D
27.2 On-Chip Debug Security ID
The RL78 microcontroller has an on-chip debug operation control bit in the flash memory at 000C3H (see CHAPTER
25 OPTION BYTE) and an on-chip debug security ID setting area at 000C4H to 000CDH, to prevent third parties from
reading memory content.
When the boot swap function is used, also set a value that is the same as that of 010C3H and 010C4H to 010CDH in
advance, because 000C3H, 000C4H to 000CDH and 010C3H, and 010C4H to 010CDH are switched.
000C4H to 000CDH
010C4H to 010CDH
27.3 Securing of User Resources
To perform communication between the RL78 microcontroller and E1 on-chip debugging emulator, as well as each
debug function, the securing of memory space must be done beforehand.
If Renesas Electronics assembler or compiler is used, the items can be set by using link options.
(1) Securement of memory space
The shaded portions in Figure 27-2 are the areas reserved for placing the debug monitor program, so user
programs or data cannot be allocated in these spaces. When using the on-chip debug function, these spaces must
be secured so as not to be used by the user program. Moreover, this area must not be rewritten by the user
program.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Table 27-1. On-Chip Debug Security ID
Address
Any ID code of 10 bytes (Except for all FFHs)
CHAPTER 27 ON-CHIP DEBUG FUNCTION
On-Chip Debug Security ID
788

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