Renesas RL78 Series User Manual page 538

16-bit single-chip microcontrollers
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RL78/G1D
13.7.5 Calculating transfer rate
The transfer rate for simplified I
(Transfer rate) = {Operation clock (f
Caution SDRmn[15:9] must not be set to 00000000B. Be sure to set a value of 00000001B or greater
for SDRmn[15:9]. The duty ratio of the SCL signal output by the simplified I
bus specifications define that the low-level width of the SCL signal is longer than the high-
level width. If 400 kbps (fast mode) or 1 Mbps (fast mode plus) is specified, therefore, the low-
level width of the SCL output signal becomes shorter than the value specified in the I
specifications. Make sure that the SDRmn[15:9] value satisfies the I
Remarks 1.
2.
The operation clock (f
MCK
register mn (SMRmn).
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
2
C (IIC00, IIC20) communication can be calculated by the following expressions.
) frequency of target channel} ÷ (SDRmn[15:9] + 1) ÷ 2
MCK
The value of SDRmn[15:9] is the value of bits 15 to 9 of the SDRmn register (0000001B to
1111111B) and therefore is 1 to 127.
m: Unit number (m = 0, 1), n: Channel number (n = 0), mn = 00, 10
) is determined by serial clock select register m (SPSm) and bit 15 (CKSmn) of serial mode
CHAPTER 13 SERIAL ARRAY UNIT
2
C is 50%. The I
2
C bus specifications.
2
C
2
C bus
517

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