Renesas RL78 Series User Manual page 363

16-bit single-chip microcontrollers
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RL78/G1D
12.6.3 Software trigger mode (scan mode, sequential conversion mode)
<1> In the stop status, the ADCE bit of A/D converter mode register 0 (ADM0) is set to 1, and the system enters the
A/D conversion standby status.
<2> After the software counts up to the stabilization wait time (1 µs), the ADCS bit of the ADM0 register is set to 1 to
perform A/D conversion on the four analog input channels specified by scan 0 to scan 3, which are specified by
the analog input channel specification register (ADS). A/D conversion is performed on the analog input channels
in order, starting with that specified by scan 0.
<3> A/D conversion is sequentially performed on the four analog input channels, the conversion results are stored in
the A/D conversion result register (ADCR, ADCRH) each time conversion ends, and the A/D conversion end
interrupt request signal (INTAD) is generated.
conversion of the channel following the specified channel automatically starts (until all four channels are finished).
<4> When ADCS is overwritten with 1 during conversion operation, the current A/D conversion is interrupted, and
conversion restarts at the first channel. The partially converted data is discarded.
<5> When the value of the ADS register is rewritten or overwritten during conversion operation, the current A/D
conversion is interrupted, and A/D conversion is performed on the first channel respecified by the ADS register.
The partially converted data is discarded.
<6> Even if a hardware trigger is input during conversion operation, A/D conversion does not start.
<7> When ADCS is cleared to 0 during conversion operation, the current A/D conversion is interrupted, and the
system enters the A/D conversion standby status.
<8> When ADCE is cleared to 0 while in the A/D conversion standby status, the A/D converter enters the stop status.
When ADCE = 0, specifying 1 for ADCS is ignored and A/D conversion does not start.
Figure 12-19. Example of Software Trigger Mode (Scan Mode, Sequential Conversion Mode) Operation Timing
<1>
ADCE is set to 1.
ADCE
<2>
ADCS is set to 1 while in the
The trigger
conversion standby status.
is not
acknowledged.
ADCS
ADS
ANI0 to ANI3
A/D conversion ends and the
A/D
Stop
Conversion
Data 0
Data 1
conversion
standby
(ANI0)
(ANI1)
status
status
ADCR,
Data 0
(ANI0)
ADCRH
INTAD
The interrupt is generated four times.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
<4>
<3>
next conversion starts.
Data 2
Data 3
Data 0
Data 0
Data 1
(ANI2)
(ANI3)
(ANI0)
(ANI0)
(ANI1)
Data 1
Data 2
Data 3
Data 0 (ANI0)
(ANI1)
(ANI2)
(ANI3)
After A/D conversion of the four channels ends, the A/D
ADCS is overwritten
A hardware trigger is
with 1 during A/D
generated (and ignored).
conversion operation.
<5>
<3>
Conversion is
interrupted and restarts.
Data 1
Data 2
Data 3
Data 0
Data 1
(ANI1)
(ANI2)
(ANI3)
(ANI0)
(ANI1)
Data 1
Data 2
Data 3
(ANI1)
(ANI2)
(ANI3)
The interrupt is generated four times.
CHAPTER 12 A/D CONVERTER
ADCE is cleared to 0. <8>
ADCS is cleared
<6>
to 0 during A/D
conversion operation.
ADS is rewritten during
A/D conversion operation.
ANI4 to ANI7
<3>
Conversion is
interrupted and restarts.
Data 4
Data 5
Data 6
Data 7
Data 4
(ANI4)
(ANI5)
(ANI6)
(ANI7)
(ANI4)
Data 0
Data 4
Data 5
Data 6
Data 7
(ANI0)
(ANI4)
(ANI5)
(ANI6)
(ANI7)
The interrupt is generated four times.
<7>
The trigger
is not
acknowledged.
Conversion is
interrupted.
Stop
Data 5
Conversion
standby
(ANI5)
status
Data 4
(ANI4)
342

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