Renesas RL78 Series User Manual page 278

RL78/G1D
Remarks 1. m: Unit number (m = 0), n: Master channel number (n = 0, 2, 4)
2. TSmn, TSmp, TSmq:
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
p: Slave channel number 1, q: Slave channel number 2
n < p < q 7 (Where p and q are integers greater than n)
≤
TEmn, TEmp, TEmq:
TCRmn, TCRmp, TCRmq: Timer count registers mn, mp, mq (TCRmn, TCRmp, TCRmq)
TDRmn, TDRmp, TDRmq: Timer data registers mn, mp, mq (TDRmn, TDRmp, TDRmq)
TO0n, TO0p, TO0q: TO0n, TO0p, and TO0q pins output signal
Bit n, p, q of timer channel start register m (TSm)
Bit n, p, q of timer channel enable status register m (TEm)
CHAPTER 7 TIMER ARRAY UNIT
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