Renesas RL78 Series User Manual page 497

RL78/G1D
(4) Processing flow (in continuous transmission mode)
Figure 13-81. Timing Chart of UART Transmission (in Continuous Transmission Mode)
<1>
SSmn
STmn
SEmn
SDRmn
Transmit data 1
TxDq pin
ST
Shift
register mn
INTSTq
MDmn0
TSFmn
BFFmn
<2> <3>
Note
Note If transmit data is written to the SDRmn register while the BFFmn bit of serial status register mn (SSRmn) is
1 (valid data is stored in serial data register mn (SDRmn)), the transmit data is overwritten.
Caution The MDmn0 bit of serial mode register mn (SSRmn) can be rewritten even during operation.
However, rewrite it before transfer of the last bit is started, so that it will be rewritten before the
transfer end interrupt of the last transmit data.
Remark m: Unit number (m = 0), n: Channel number (n = 0, 2), q: UART number (q = 0, 1)
mn = 00, 02
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Transmit data 2
ST
Transmit data 1
P
SP
Shift operation
Data transmission
<2> <3>
CHAPTER 13 SERIAL ARRAY UNIT
Transmit data 3
Transmit data 2
P
SP
Shift operation
Data transmission
<2> <3>
ST Transmit data 3
Shift operation
Data transmission
<4>
<6>
P SP
<5>
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