Renesas RL78 Series User Manual page 631

RL78/G1D
15.3.1 Digital block
The digital blocks consist of a baseband block, an interface block, an RF memory block, an RF control block, and a
modem block.
Radio controller
Whitening
(1) Baseband control registers
Consists of a register group that controls the baseband block.
(2) Memory controller
Controls the interface with the memory block and the memory block itself.
(3) White list search engine
Manages the white list.
(4) Event scheduler
Manages the schedule for performing transmission and reception events.
(5) Event controller
Controls the transmission and reception events.
(6) Packet controller
Generates transmit packets and analyzes receive packets.
(7) Frequency selector
Selects the channel for frequency hopping.
(8) CRC
Operates CRC of the transmit data and receive data.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 15-2. Block Diagram of Baseband Block
Timing
generator
Frequency
selector
CRC
CHAPTER 15 RF TRANSCEIVER
Baseband control
Interrupt
generator
AES CCM code
Event scheduler
Event controller
Packet controller
registers
Memory
controller
White list
search engine
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