User Manuals: Renesas RL78/F14 Microcontrollers

Manuals and User Guides for Renesas RL78/F14 Microcontrollers. We have 5 Renesas RL78/F14 Microcontrollers manuals available for free PDF download: User Manual

Renesas RL78/F14 User Manual (1879 pages)

16-Bit Single-Chip Microcontrollers

Brand: Renesas | Category: Microcontrollers | Size: 21 MB

Table of Contents
7
Chapter 1 Overview

33
Chapter 2 Pin Functions

79
- Pin Function List
  79
- RL78/F14 100-Pin Products
  81
- RL78/F13 (CAN and LIN Incorporated) 80-Pin Products
  83
- RL78/F13 (LIN Incorporated) 80-Pin Products
  85
- Pins for each Product (Pins Other than Port Pins)
  87
- Description of Pin Functions
  100
- P00 to P03 (Port 0)
  100
- P10 to P17 (Port 1)
  100
- P30 to P34 (Port 3)
  102
- P40 to P47 (Port 4)
  103
- P50 to P57 (Port 5)
  104
- P60 to P67 (Port 6)
  105
- P70 to P77 (Port 7)
  107
- P80 to P87 (Port 8)
  108
- P90 to P97 (Port 9)
  109
- P100 to P107 (Port 10)
  109
- P120 to P127 (Port 12)
  110
- P130, P137 (Port 13)
  111
- P140 (Port 14)
  111
- P150 to P157 (Port 15)
  112
- VDD, Evdd0, Evdd1, Vss, Evss0, Evss1
  112
- Reset
  113
- Regc
  113
- Recommended Connection of Unused Pins
  114
Chapter 3 Cpu Architecture

120
- Memory Space
  120
- Internal Program Memory Space
  146
- Mirror Area
  150
- Internal Data Memory Space
  152
- Special Function Register (SFR) Area
  153
- Extended Special Function Register (2Nd SFR: 2Nd Special Function Register) Area
  153
- Data Memory Addressing
  154
- Processor Registers
  172
- Control Registers
  172
- General-Purpose Registers
  175
- ES and CS Registers
  177
- Special Function Registers (Sfrs)
  178
- Extended Special Function Registers (2Nd Sfrs: 2Nd Special Function Registers)
  183
- Instruction Address Addressing
  216
- Relative Addressing
  216
- Immediate Addressing
  216
- Table Indirect Addressing
  217
- Register Direct Addressing
  218
- Addressing for Processing Data Addresses
  219
- Implied Addressing
  219
- Register Addressing
  219
- Direct Addressing
  220
- Short Direct Addressing
  221
- SFR Addressing
  222
- Register Indirect Addressing
  223
- Based Addressing
  224
- Based Indexed Addressing
  228
- Stack Addressing
  229
Chapter 4 Port Functions

233
- Port Functions
  233
- Port Configuration
  235
- Port 0
  236
- Port 1
  241
- Port 3
  252
- Port 4
  258
- Port 5
  268
- Port 6
  278
- Port 7
  288
- Port 8
  302
- Port 9
  312
- Port 10
  315
- Port 12
  320
- Port 13
  327
- Port 14
  330
- Port 15
  332
- Registers Controlling Port Function
  339
- Port Mode Registers (Pmxx)
  351
- Port Registers (Pxx)
  352
- Pull-Up Resistor Option Registers (Puxx)
  354
- Port Input Mode Registers (PIM1, PIM3, PIM5 to PIM7, PIM12)
  355
- Port Output Mode Registers (POM1, POM6, POM7, POM12)
  356
- Port Mode Control Registers 7, 9, 12 (PMC7, PMC9, PMC12)
  357
- A/D Port Configuration Register (ADPC)
  358
- Port Input Threshold Control Register
  360
- (PITHL1, PITHL3 to PITHL7, PITHL10, PITHL12, PITHL15)
  360
- Peripheral I/O Redirection Register 0 (PIOR0)
  362
- Peripheral I/O Redirection Register 1 (PIOR1)
  363
- Peripheral I/O Redirection Register 2 (PIOR2)
  364
- Peripheral I/O Redirection Register 3 (PIOR3)
  365
- Peripheral I/O Redirection Register 4 (PIOR4)
  366
- Peripheral I/O Redirection Register 5 (PIOR5)
  368
- Peripheral I/O Redirection Register 6 (PIOR6)
  369
- Peripheral I/O Redirection Register 7 (PIOR7)
  370
- Peripheral I/O Redirection Register 8 (PIOR8)
  371
- Port Output Slew Rate Register (PSRSEL)
  372
- SNOOZE Status Output Control Register 0 (PSNZCNT0)
  373
- SNOOZE Status Output Control Register 1 (PSNZCNT1)
  374
- SNOOZE Status Output Control Register 2 (PSNZCNT2)
  375
- SNOOZE Status Output Control Register 3 (PSNZCNT3)
  376
- Port Mode Select Register (PMS)
  377
- Port Function Operations
  378
- Writing to I/O Port
  378
- Reading from I/O Port
  378
- Operations on I/O Port
  378
- Connecting to External Device with Different Potential (3 V)
  379
- Settings of Port Mode Register and Output Latch When Using Alternate Function
  381
- Cautions When Using Port Function
  392
- Cautions on 1-Bit Manipulation Instruction for Port Register N (Pn)
  392
- Notes on Specifying the Pin Settings
  393
Chapter 5 Clock Generator

394
Chapter 6 Timer Array Unit

456
Chapter 7 Timer Rj

575
- I/O Pins
  576
  - Registers
    577
  - Peripheral Enable Register 1 (PER1)
    578
  - Operation Speed Mode Control Register (OSMC)
    579
- Timer RJ Counter Register 0 (TRJ0), Timer RJ Reload Register
  580
- Timer RJ Control Register 0 (TRJCR0)
  581
- Timer RJ I/O Control Register 0 (TRJIOC0)
  583
- Timer RJ Mode Register 0 (TRJMR0)
  585
- Timer RJ Event Pin Select Register 0 (TRJISR0)
  586
- Port Mode Registers 1, 4 (PM1, PM4)
  587
- Operation
  588
- Timer Mode
  589
- Pulse Output Mode
  590
- Event Counter Mode
  591
- Pulse Width Measurement Mode
  593
- Pulse Period Measurement Mode
  594
- Coordination with Event Link Controller (ELC)
  595
- Notes on Timer RJ
  596
- Procedure for Setting Pins TRJO0 and TRJIO0
  597
- Functional Restriction in STOP Mode (Event Counter Mode Only)
  598
Chapter 8 Timer Rd

599
Chapter 9 Real-Time Clock

688
Chapter 10 Clock Output/Buzzer Output Controller

718
Chapter 11 Watchdog Timer

725
Chapter 12 A/D Converter

732
CHAPTER 13 D/A CONVERTER (RL78/F14 Only)

795
- Configuration of D/A Converter
  796
- D/A Converter Mode Register (DAM)
  800
- D/A Converter Mode Register 2 (DAM2)
  801
- D/A Conversion Value Setting Register 0 (DACS0)
  802
- Port Mode Register 8 (PM8)
  803
  - Operations of D/A Converter
    805
  - Operation in Real-Time Output Mode
    806
  - Cautions for D/A Converter
    807
CHAPTER 14 COMPARATOR (RL78/F14 Only)

808
- Registers to Control the Comparator
  810
- Comparator Control Register (CMPCTL)
  811
- Comparator I/O Select Register (CMPSEL)
  813
- Comparator Output Monitor Register (CMPMON)
  814
- A/D Port Configuration Register (ADPC)
  815
- D/A Converter Mode Register 2 (DAM2)
  816
- Port Mode Register 4 (PM4)
  817
- Port Mode Register (PM8)
  818
- Operation
  819
- Noise Filter
  820
- Comparator Interrupts
  821
- Comparator Setting Flowchart
  822
Chapter 15 Serial Array Unit

824
Chapter 16 Serial Interface Iica

1048
- Configuration of Serial Interface IICA
  1051
- Registers Controlling Serial Interface IICA
  1054
- IICA Control Register 00 (IICCTL00)
  1055
- IICA Status Register 0 (IICS0)
  1060
- IICA Flag Register 0 (IICF0)
  1062
- IICA Control Register 01 (IICCTL01)
  1064
- IICA Low-Level Width Setting Register 0 (IICWL0)
  1066
- Port Mode Register 6 (PM6)
  1067
- Port Output Mode Register (POM6)
  1068
- Pin Configuration
  1069
- Setting Transfer Clock by Using IICWL0 and IICWH0 Registers
  1070
- Start Conditions
  1072
- Addresses
  1073
- Acknowledge (ACK)
  1074
- Stop Condition
  1075
- Wait
  1076
- Canceling Wait
  1078
- Interrupt Request (INTIICA0) Generation Timing and Wait Control
  1079
- Address Match Detection Method
  1080
- Arbitration
  1081
- Wakeup Function
  1083
- Communication Reservation
  1086
- Cautions
  1090
- Communication Operations
  1091
- Timing Charts
  1119
Chapter 17 Lin/Uart Module (Rlin3)

1134
- Register Descriptions
  1139
- LIN Registers for Master Mode
  1141
- LIN Registers for Slave Mode
  1169
- Registers for UART
  1197
- Modes
  1227
- LIN Reset Mode
  1229
- LIN Mode
  1230
- UART Mode
  1232
- LIN Mode
  1233
- Data Transmission/Reception
  1241
- Transmission/Reception Data Buffering
  1243
- Wake-Up Transmission/Reception
  1246
- Status
  1248
- Error Status
  1250
- UART Mode
  1256
- Data Transmission/Reception
  1271
- Buffer Processing of Transmission Data
  1273
- Status
  1274
- Error Status
  1275
- LIN Self-Test Mode
  1276
- Change to LIN Self-Test Mode
  1277
- Transmission in LIN Master Self-Test Mode
  1278
- Reception in LIN Master Self-Test Mode
  1279
- Transmission in LIN Slave Self-Test Mode
  1280
- Reception in LIN Slave Self-Test Mode
  1281
- Terminating LIN Self-Test Mode
  1282
- Baud Rate Generator
  1283
- LIN Slave Mode
  1285
- UART Mode
  1287
- Noise Filter
  1288
- Interrupts
  1290
Chapter 18 Can Interface (Rs-Can Lite)

1291
Chapter 19 Dtc

1458
- Registers
  1460
- Allocation of DTC Control Data Area and DTC Vector Table Area
  1462
- DTC Control Data Allocation
  1463
- DTC Vector Table
  1464
- Peripheral Enable Register 1 (PER1)
  1468
- DTC Activation Enable Register I (Dtceni) (I = 0 to 5)
  1469
- DTC Base Address Register (DTCBAR)
  1472
- DTC Control Register J (Dtccrj) (J = 0 to 23)
  1473
- DTC Block Size Register J (Dtblsj) (J = 0 to 23)
  1474
- DTC Transfer Count Reload Register J (Dtrldj) (J = 0 to 23)
  1475
- High-Speed DTC Channel Select Register 0 (SELHS0)
  1476
- High-Speed DTC Channel Select Register 1 (SELHS1)
  1477
- High-Speed DTC Control Register M (HDTCCR0/1) (M = 0, 1)
  1478
- High-Speed DTC Transfer Count Register M (HDTCCT0/1) (M = 0, 1)
  1479
- DTC Transfer Count Reload Register M (HDTRLD0/1) (M = 0, 1)
  1480
- Operation
  1481
- Normal Mode
  1483
- Repeat Mode
  1485
- Chain Transfers
  1489
- High-Speed Transfer Operation
  1491
- Notes on DTC
  1492
- DTC Pending Instruction
  1493
- Number of DTC Execution Clock Cycles
  1494
- Number of High-Speed DTC Execution Clock Cycles
  1495
- DTC Response Time
  1496
- Operation in Standby Mode Status
  1497
CHAPTER 20 EVENT LINK CONTROLLER (ELC) (RL78/F14 Only)

1498
- Registers
  1499
- Event Output Destination Select Register N (Elselrn) (N = 00 to 25)
  1500
- Timer Input Select Register 0
  1503
- Operation
  1504
Chapter 21 Interrupt Functions

1505
Chapter 22 Key Interrupt Function

1547
- Configuration of Key Interrupt
  1548
- Register Controlling Key Interrupt
  1549
Chapter 23 Standby Function

1550
- Registers Controlling Standby Function
  1551
- Oscillation Stabilization Time Counter Status Register (OSTC)
  1552
- Oscillation Stabilization Time Select Register (OSTS)
  1553
- STOP Status Output Control Register (STPSTC)
  1554
- Standby Function Operation
  1555
- STOP Mode
  1562
- SNOOZE Mode
  1568
Chapter 24 Reset Function

1573
- Register for Confirming Reset Source
  1584
- POR/CLM Reset Confirmation Register (POCRES)
  1585
Chapter 25 Power-On-Reset Circuit

1587
- Configuration of Power-On-Reset Circuit
  1588
- Cautions for Power-On-Reset Circuit
  1591

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User Manuals: Renesas RL78/F14 Microcontrollers

Renesas RL78/F14 User Manual (1879 pages)

Table of Contents

Chapter 1 Overview

Chapter 2 Pin Functions

Chapter 3 Cpu Architecture

Chapter 4 Port Functions

Chapter 5 Clock Generator

Chapter 6 Timer Array Unit

Chapter 7 Timer Rj

Chapter 8 Timer Rd

Chapter 9 Real-Time Clock

Chapter 10 Clock Output/Buzzer Output Controller

Chapter 11 Watchdog Timer

Chapter 12 A/D Converter

CHAPTER 13 D/A CONVERTER (RL78/F14 Only)

CHAPTER 14 COMPARATOR (RL78/F14 Only)

Chapter 15 Serial Array Unit

Chapter 16 Serial Interface Iica

Chapter 17 Lin/Uart Module (Rlin3)

Chapter 18 Can Interface (Rs-Can Lite)

Chapter 19 Dtc

CHAPTER 20 EVENT LINK CONTROLLER (ELC) (RL78/F14 Only)

Chapter 21 Interrupt Functions

Chapter 22 Key Interrupt Function

Chapter 23 Standby Function

Chapter 24 Reset Function

Chapter 25 Power-On-Reset Circuit

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