Renesas RL78 Series User Manual page 576

16-bit single-chip microcontrollers
Hide thumbs Also See for RL78 Series:
Table of Contents

Advertisement

RL78/G1D
Figure 14-23. Flow When Setting WUPn = 0 upon Address Match (Including Extension Code Reception)
Use the following flows to perform the processing to release the STOP mode other than by an interrupt request
(INTIICAn) generated from serial interface IICA.
● When operating next IIC communication as master: Flow shown in Figure 14-24.
● When operating next IIC communication as slave
When released by INTIICAn interrupt: Same as the flow in Figure 14-23.
When released by other than INTIICAn interrupt: Wait for INTIICAn interrupt with WUPn left set to 1.
Remark n = 0
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
INTIICAn = 1?
Yes
WUPn = 0
Wait
Reading IICSn
Executes processing corresponding to the operation to be executed
after checking the operation state of serial interface IICA.
CHAPTER 14 SERIAL INTERFACE IICA
STOP mode state
No
Waits for five cycles of f
.
MCK
555

Advertisement

Table of Contents
loading

This manual is also suitable for:

Rl78/g1dR5f11aggR5f11aghR5f11agj

Table of Contents