Renesas RL78 Series User Manual page 481

16-bit single-chip microcontrollers
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RL78/G1D
Figure 13-71. Flowchart of SNOOZE Mode Operation (once startup)
Remarks 1. <1> to <11> in the figure correspond to <1> to <11> in Figure 13-70 Timing Chart of SNOOZE
Mode Operation (once startup).
2. m = 0; p = 00.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
SNOOZE mode operation
TSFmn = 0 for all channels?
Yes
<1>
Write 1 to STm0 bit
SAU default setting
Setting SSCm register
<2>
(SWCm = 1, SSECm = 0)
<3>
Write 1 to SSm0 bit
Enables interrupt
processing
<4>
Entered the STOP mode
<5>
<6>
<7>
<8>
Reading receive data from
SIOp (=SDRmn[7:0])
Write 1 to STm0 bit
<9>
<10>
Write 0 to SWCm bit
Write 1 to SSm0 bit
<11>
End of SNOOZE mode
CHAPTER 13 SERIAL ARRAY UNIT
No
Become the operation STOP status (SEm0 = 0)
SMRm0, SCRm0:
Communication setting
SDRm0 [15:9]:
Setting 0000000B
Setting SNOOZE mode
Become the communication wait status (SEm0 = 1)
Clear interrupt request flag (XXIF), reset interrupt mask (XXMK)
and enable interrupt processing.
CPU/peripheral hardware clock f
CLK
to the SAU is stopped.
SCKp valid edge detected
(Entered the SNOOZE mode)
Input of the serial clock on the
SCKp pin
(CSIp is receive operation)
Transfer interrupt (INTCSIp) is
generated
(CSIp is receive completion)
The mode switches from SNOOZE to normal operation.
Become the operation STOP status (SEm0 = 0)
Reset SNOOZE mode setting
It becomes communication ready state (SEm0 = 1) under
normal operation
supplied
460

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