Renesas RL78 Series User Manual page 253

16-bit single-chip microcontrollers

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Figure 7-56. Block Diagram of Operation as Input Signal High-/Low-Level Width Measurement

Operation clock

Note For channels 1 and 3, the clock can be selected from CKm0, CKm1, CKm2 and CKm3.

Figure 7-57. Example of Basic Timing of Operation as Input Signal High-/Low-Level Width Measurement

Remarks 1. m: Unit number (m = 0), n: Channel number (n = 0 to 7)

R01UH0515EJ0120 Rev.1.20

Dec 16, 2016

2. TSmn: Bit n of timer channel start register m (TSm)

TEmn: Bit n of timer channel enable status register m (TEm)

TImn: TImn pin input signal

TCRmn: Timer count register mn (TCRmn)

TDRmn: Timer data register mn (TDRmn)

OVF: Bit 0 of timer status register mn (TSRmn)

Timer counter

CHAPTER 7 TIMER ARRAY UNIT

Interrupt signal

Rl78/g1d R5f11agg R5f11agh R5f11agj