Renesas RL78 Series User Manual page 135

RL78/G1D
(2) Subsystem clock
● XT1 clock oscillator
This circuit oscillates a clock of f
Oscillation can be stopped by setting the XTSTOP bit (bit 6 of the clock operation status control register (CSC)).
An external subsystem clock (f
external subsystem clock input can be disabled by the setting of the XTSTOP bit.
(3) Low-speed on-chip oscillator clock (Low-speed On-chip oscillator)
This circuit oscillates a clock of f
The low-speed on-chip oscillator clock cannot be used as the CPU clock.
Only the following peripheral hardware runs on the low-speed on-chip oscillator clock.
● Watchdog timer
● Real-time clock
● 12-bit Interval timer
This clock operates when bit 4 (WDTON) of the option byte (000C0H), bit 4 (WUTMMCK0) of the subsystem
clock supply mode control register (OSMC), or both are set to 1.
However, when WDTON = 1, WUTMMCK0 = 0, and bit 0 (WDSTBYON) of the option byte (000C0H) is 0,
oscillation of the low-speed on-chip oscillator stops if the HALT or STOP instruction is executed.
Caution The low-speed on-chip oscillator clock (f
clock when the fixed-cycle interrupt function is used.
(4) RF transceiver reference clock
This circuit oscillates a clock of f
This oscillation control is set with Renesas Bluetooth Low Energy protocol stack.
Remark f :
X
f :
IH
f :
EX
f :
XT
f :
EXS
f :
IL
f :
XRF
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
= 32.768 kHz by connecting a 32.768 kHz resonator to XT1 and XT2.
XT
= 32.768 KHz) can also be supplied from the EXCLKS/XT2/P124 pin. An
EXS
= 15 kHz (TYP.).
IL
= 32 MHz by connecting a resonator to the XTAL1_RF and XTAL2_RF pins.
XRF
X1 clock oscillation frequency
High-speed on-chip oscillator clock frequency
External main system clock frequency
XT1 clock oscillation frequency
External subsystem clock frequency
Low-speed on-chip oscillator clock frequency
RF reference clock oscillating frequency
CHAPTER 6 CLOCK GENERATOR
) can only be selected as the real-time clock count
IL
114