RL78/G1D
Figure 7-64. Block Diagram of Operation as One-Shot Pulse Output Function
Master channel
(one-count mode)
CKm1
Operation clock
CKm0
TNFEN0x
Noise
TI0n pin
filter
Slave channel
(one-count mode)
CKm1
Operation clock
CKm0
Remark
m: Unit number (m = 0), n: Master channel number (n = 0, 2, 4, 6)
p: Slave channel number (n < p
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
TSmn
Edge
detection
7)
≤
CHAPTER 7 TIMER ARRAY UNIT
Timer counter
register mn (TCRmn)
Timer data
register mn (TDRmn)
Timer counter
register mp (TCRmp)
Timer data
register mp (TDRmp)
Interrupt
Interrupt signal
controller
(INTTMmn)
Output
TOmp pin
controller
Interrupt
Interrupt signal
controller
(INTTMmp)
241