Renesas RL78 Series User Manual page 863

RL78/G1D
(6) During communication at same potential (simplified I
(T = –40 to +85°C, 1.6 V ≤ V
A
Parameter
Data setup time (reception)
Data hold time (transmission) t
Notes 1. The value must also be f
2. Set the f value to keep the hold time of SCLr = "L" and SCLr = "H".
MCK
Caution Select the normal input buffer and the N-ch open drain output (V
and the normal output mode for the SCLr pin by using port input mode register g (PIMg) and port
output mode register h (POMh).
(Remarks are listed on the next page.)
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
= V = AV ≤ 3.6 V, V
DD DD_RF DD_RF
Symbol Conditions
t
2.7 V ≤ V ≤ 3.6 V,
SU:DAT
DD
C = 50 pF, R = 2.7 kΩ
b b
2.4 V ≤ V ≤ 3.6 V,
DD
C = 100 pF, R = 3 kΩ
b b
1.8 V ≤ V < 3.6 V,
DD
C = 100 pF, R = 3 kΩ
b b
2.4 V ≤ V < 2.7 V,
DD
C = 100 pF, R = 5 kΩ
b b
1.8 V ≤ V < 2.7 V,
DD
C = 100 pF, R = 5 kΩ
b b
1.6 V ≤ V < 1.8 V,
DD
C = 100 pF, R = 5 kΩ
b b
2.7 V ≤ V ≤ 3.6 V,
HD:DAT
DD
C = 50 pF, R = 2.7 kΩ
b b
2.4 V ≤ V ≤ 3.6 V,
DD
C = 100 pF, R = 3 kΩ
b b
1.8 V ≤ V < 3.6 V,
DD
C = 100 pF, R = 3 kΩ
b b
2.4 V ≤ V < 2.7 V,
DD
C = 100 pF, R = 5 kΩ
b b
1.8 V ≤ V < 2.7 V,
DD
C = 100 pF, R = 5 kΩ
b b
1.6 V ≤ V < 1.8 V,
DD
C = 100 pF, R = 5 kΩ
b b
/4 or lower.
MCK
CHAPTER 30 ELECTRICAL SPECIFICATIONS
2
C mode) (2/2)
= V = AV = 0 V)
SS SS_RF SS_RF
HS (high-speed LS (low-speed
main) Mode main) Mode
MIN. MAX. MIN.
1/f + 1/f
MCK MCK
Note2
85 + 145
Note2
1/f 1/f
MCK MCK
+ 145 + 145
Note2 Note2
– 1/f
MCK
+ 145
Note2
1/f 1/f
MCK MCK
+ 230 + 230
Note2 Note2
– 1/f
MCK
+ 230
Note2
– –
0 305 0
0 355 0
– – 0
0 405 0
– – 0
– – –
tolerance) mode for the SDAr pin
DD
LV (low-voltage
main) Mode
MAX. MIN. MAX.
1/f
MCK
+ 145
Note2
1/f
MCK
+ 145
Note2
1/f
MCK
+ 145
Note2
1/f
MCK
+ 230
Note2
1/f
MCK
+ 230
Note2
1/f
MCK
+ 290
Note2
305 0 305
355 0 355
355 0 355
405 0 405
405 0 405
– 0 405
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
842