Renesas RL78 Series User Manual page 439

RL78/G1D
(4) Processing flow (in continuous reception mode)
Figure 13-38. Timing Chart of Master Reception (in Continuous Reception Mode) (Type 1: DAPmn = 0, CKPmn = 0)
<1>
SSmn
STmn
SEmn
SDRmn
Dummy data
<2> Write
SCKp pin
SIp pin
Shift
register mn
INTCSIp
MDmn0
TSFmn
BFFmn
<3>
Caution The MDmn0 bit can be rewritten even during operation.
However, rewrite it before receive of the last bit is started, so that it has been rewritten before the
transfer end interrupt of the last receive data.
Remarks 1. <1> to <8> in the figure correspond to <1> to <8> in Figure 13-39 Flowchart of Master Reception
(in Continuous Reception Mode).
2. m: Unit number (m = 0, 1), n: Channel number (n = 0), p: CSI number (p = 00, 20), mn = 00, 10
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Dummy data Receive data 1
<2> Write
Receive data 1
Reception & shift operation
Data reception
<3>
CHAPTER 13 SERIAL ARRAY UNIT
Dummy data
<2> Write
Read
Receive data 2
Reception & shift operation
Data reception
<4> <3>
Receive data 3
Receive data 2
Read
Receive data 3
Reception & shift operation
Data reception
<5>
<4> <6> <7>
<8>
Read
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