Renesas RL78 Series User Manual page 780

RL78/G1D
Note
Address: 000C1H/010C1H
7
VPOC2
● LVD setting (interrupt mode)
Detection voltage
V
LVD
Rising edge Falling edge
1.67 V 1.63 V
1.77 V 1.73 V
1.88 V 1.84 V
1.98 V 1.94 V
2.09 V 2.04 V
2.50 V 2.45 V
2.61 V 2.55 V
2.71 V 2.65 V
2.81 V 2.75 V
2.92 V 2.86 V
3.02 V 2.96 V
3.13 V 3.06 V
–
● LVD off (by controlling the externally input reset signal on the RESET pin)
Detection voltage
V
LVD
Rising edge Falling edge
– –
–
Note Set the same value as 000C1H to 010C1H when the boot swap operation is used because 000C1H is replaced
by 010C1H.
Cautions 1. Be sure to set bit 4 to "1".
2. After power is supplied, the reset state must be retained until the operating voltage becomes in
the range defined in 30.6 AC Characteristics. This is done by utilizing the voltage detection circuit
or controlling the externally input reset signal. After the power supply is turned off, this LSI
should be placed in the STOP mode, or placed in the reset state by utilizing the voltage detection
circuit or controlling the externally input reset signal, before the voltage falls below the operating
range. The range of operating voltage varies with the setting of the user option byte (000C2H or
010C2H).
Remarks 1. ×: don't care
2. For details on the LVD circuit, see CHAPTER 22 VOLTAGE DETECTOR.
3. The detection voltage is a typical value. For details, see 30.8.4 LVD circuit characteristics.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 25-2. Format of User Option Byte (000C1H/010C1H) (2/2)
6 5
VPOC1 VPOC0
VPOC2 VPOC1
0 0
0
0
0
0
1
1
1
1
1
1
0
Setting of values other than above is prohibited.
VPOC2 VPOC1
1 ×
Setting of values other than above is prohibited.
4 3
1 LVIS1 LVIS0
Option byte setting value
VPOC0 LVIS1
0 1
0 1
1 1
1 1
1 0
0 1
0 1
0 0
1 1
1 1
1 0
1 0
Option byte setting value
VPOC0 LVIS1
× ×
CHAPTER 25 OPTION BYTE
2 1
LVIMDS1 LVIMDS0
LVIS0 Mode setting
LVIMDS1 LVIMDS0
1 0
0
1
0
1
1
0
1
1
0
1
0
LVIS0 Mode setting
LVIMDS1 LVIMDS0
× ×
0
1
1
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