Renesas RL78 Series User Manual page 9

5.4.2 Reading from I/O port ..................................................................................................................... 101
5.4.3 Operations on I/O port .................................................................................................................... 101
5.4.4 Handling different potential (1.8 V, 2.5 V) by using EVDD ≤ VDD .................................................. 102
5.4.5 Handling different potential (1.8 V, 2.5 V) by using I/O buffers ....................................................... 102
5.5 Register Settings When Using Alternate Function ................................................................. 104
5.5.1 Basic concept when using alternate function .................................................................................. 104
5.5.2 Register settings for alternate function whose output function is not used ..................................... 105
5.5.3 Register setting examples for used port and alternate functions .................................................... 106
5.6 Cautions When Using Port Function ........................................................................................ 111
5.6.1 Cautions on 1-bit manipulation instruction for port register n (Pn) .................................................. 111
5.6.2 Notes on specifying the pin settings ............................................................................................... 112
CHAPTER 6 CLOCK GENERATOR .................................................................................................... 113
6.1 Functions of Clock Generator ................................................................................................... 113
6.2 Configuration of Clock Generator ............................................................................................ 115
6.3 Registers Controlling Clock Generator .................................................................................... 117
6.3.1 Clock operation mode control register (CMC) ................................................................................ 117
6.3.2 System clock control register (CKC) ............................................................................................... 120
6.3.3 Clock operation status control register (CSC) ................................................................................ 121
6.3.4 Oscillation stabilization time counter status register (OSTC) .......................................................... 122
6.3.5 Oscillation stabilization time select register (OSTS) ....................................................................... 124
6.3.6 Peripheral enable register 0 (PER0) ............................................................................................... 126
6.3.7 Subsystem clock supply mode control register (OSMC) ................................................................ 128
6.3.8 High-speed on-chip oscillator frequency select register (HOCODIV) ............................................. 129
6.3.9 High-speed on-chip oscillator trimming register (HIOTRM) ............................................................ 130
6.4 System Clock Oscillator ............................................................................................................ 131
6.4.1 X1 oscillator .................................................................................................................................... 131
6.4.2 XT1 oscillator .................................................................................................................................. 131
6.4.3 High-speed on-chip oscillator ......................................................................................................... 135
6.4.4 Low-speed on-chip oscillator .......................................................................................................... 135
6.4.5 RF reference clock oscillator .......................................................................................................... 135
6.5 Clock Generator Operation ....................................................................................................... 136
6.6 Controlling Clock ........................................................................................................................ 138
6.6.1 Example of setting high-speed on-chip oscillator ........................................................................... 138
6.6.2 Example of setting X1 oscillation clock ........................................................................................... 139
6.6.3 Example of setting XT1 oscillation clock ........................................................................................ 140
6.6.4 CPU clock status transition diagram ............................................................................................... 141
6.6.5 Condition before changing CPU clock and processing after changing CPU clock ......................... 147
6.6.6 Time required for switchover of CPU clock and system clock ........................................................ 149
6.6.7 Conditions before clock oscillation is stopped ................................................................................ 150
6.7 Resonator and Oscillator Constants ........................................................................................ 151
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