Renesas RL78 Series User Manual page 677

RL78/G1D
Figure 17-9. Example of Setting UART Consecutive Reception + ACK Transmission
Start
DEN0 = 1
DSA0 = 12H
DRA0 = FE00H
DBC0 = 0040H
DMC0 = 00H
Setting for UART reception
DST0 = 1
User program
processing
Note The DST0 flag is automatically cleared to 0 when a DMA transfer is completed.
Writing the DEN0 flag is enabled only when DST0 = 0. To terminate a DMA transfer without waiting for
occurrence of the interrupt of DMA0 (INTDMA0), set the DST0 bit to 0 and then the DEN0 bit to 0 (for
details, refer to 17.5.5 Forced termination by software).
Remark This is an example where a software trigger is used as a DMA start source.
If ACK is not transmitted and if only data is consecutively received from UART, the UART reception
end interrupt (INTSR0) can be used to start DMA for data reception.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
INTSR0 interrupt routine
INTSR0 occurs.
INTDMA0
occurs.
DST0 = 0
Note
DEN0 = 0
RETI
End
CHAPTER 17 DMA CONTROLLER
DMA0 is started.
STG0 = 1
DMA0 transfer
P10 = 1
P10 = 0
RETI
Hardware operation
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