Renesas RL78 Series User Manual page 291

RL78/G1D
Figure 8-5. Format of Real-time Clock Control Register 1 (RTCC1) (2/2)
RWST
0
1
This status flag indicates whether the setting of the RWAIT bit is valid.
Before reading or writing the counter value, confirm that the value of this flag is 1.
RWAIT
0
1
This bit controls the operation of the counter.
Be sure to write "1" to it to read or write the counter value.
As the internal counter (16-bit) is continuing to run, complete reading or writing within one second and turn back to
0.
When RWAIT = 1, it takes up to one cycle of f
When the internal counter (16-bit) overflowed while RWAIT = 1, it keeps the event of overflow until RWAIT = 0, then
counts up.
However, when it wrote a value to second count register, it will not keep the overflow event.
Notes1. If RWAIT is set to 1 within 1 f
cycles to be set RWST bit to 1..
2. If RWAIT is set to 1 within 1 f
SNOOZE mode), it might take two operation clock (f
Caution If writing is performed to the RTCC1 register with a 1-bit manipulation instruction, the RIFG flag and
WAFG flag may be cleared. Therefore, to perform writing to the RTCC1 register, be sure to use an 8-
bit manipulation instruction. To prevent the RIFG flag and WAFG flag from being cleared during
writing, disable writing by setting 1 to the corresponding bit. If the RIFG flag and WAFG flag are not
used and the value may be changed, the RTCC1 register may be written by using a 1-bit manipulation
instruction.
Remarks 1. Fixed-cycle interrupts and alarm match interrupts use the same interrupt source (INTRTC). When using
these two types of interrupts at the same time, which interrupt occurred can be judged by checking the
fixed-cycle interrupt status flag (RIFG) and the alarm detection status flag (WAFG) upon INTRTC
occurrence.
2. The internal counter (16 bits) is cleared when the second count register (SEC) is written.
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Counter is operating.
Mode to read or write counter value
Sets counter operation.
Stops SEC to YEAR counters. Mode to read or write counter value
clock cycle after setting RTCE to 1, it might take two operation clock (f
RTC
clock cycle after return from standby (HALT mode, STOP mode or
RTC
Wait status flag of real-time clock
Wait control of real-time clock
until the counter value can be read or written (RWST = 1).
RTC
) cycles to be set RWST bit to 1.
RTC
CHAPTER 8 REAL-TIME CLOCK
Note1, 2
)
RTC
270