Renesas RL78 Series User Manual page 242

RL78/G1D
Figure 7-46. Example of Set Contents of Registers in External Event Counter Mode (2/2)
(d) Timer output level register 0 (TOL0)
Bit n
TOL0
TOL0n
0
(e) Timer output mode register 0 (TOM0)
Bit n
TOM0
TOM0n
0
Remark m: Unit number (m = 0), n: Channel number (n = 0 to 7)
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
0: Cleared to 0 when TOM0n = 0 (master channel output mode).
0: Sets master channel output mode.
CHAPTER 7 TIMER ARRAY UNIT
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