Renesas RL78 Series User Manual page 398

RL78/G1D
13.3.1 Peripheral enable register 0 (PER0)
PER0 is used to enable or disable supplying the clock to the peripheral hardware. Clock supply to a hardware macro
that is not used is stopped in order to reduce the power consumption and noise.
When serial array unit 0 is used, be sure to set bit 2 (SAU0EN) of this register to 1.
When serial array unit 1 is used, be sure to set bit 3 (SAU1EN) of this register to 1.
The PER0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears the PER0 register to 00H.
Address: F00F0H After reset: 00H
Symbol <7>
PER0 RTCEN
SAUmEN
0
1
Cautions 1. When setting serial array unit m, be sure to first set the following registers with the SAUmEN
bit set to 1. If SAUmEN = 0, control registers of serial array unit m become default values and
writing to them is ignored (except for the input switch control register (ISC), noise filter
enable register 0 (NFEN0), port input mode registers 0, 1 (PIM0, PIM1), port output mode
registers 0, 1 (POM0, POM1), port mode control registers 0 (PMC0), port mode registers 0, 1, 7
(PM0, PM1, PM7), and port registers 0, 1, 7 (P0, P1, P7)).
● Serial clock select register m (SPSm)
● Serial mode register mn (SMRmn)
● Serial communication operation setting register mn (SCRmn)
● Serial data register mn (SDRmn)
● Serial flag clear trigger register mn (SIRmn)
● Serial status register mn (SSRmn)
● Serial channel start register m (SSm)
● Serial channel stop register m (STm)
● Serial channel enable status register m (SEm)
● Serial output enable register m (SOEm)
● Serial output level register m (SOLm)
● Serial output register m (SOm)
● Serial standby control register m (SSCm)
2. Be sure to clear bits 1 and 6 to "0".
R01UH0515EJ0120 Rev.1.20
Dec 16, 2016
Figure 13-5. Format of Peripheral Enable Register 0 (PER0)
R/W
6 <5>
0 ADCEN
Control of serial array unit m input clock supply
Stops supply of input clock.
● SFR used by serial array unit m cannot be written.
● Serial array unit m is in the reset status.
Enables input clock supply.
● SFR used by serial array unit m can be read/written.
CHAPTER 13 SERIAL ARRAY UNIT
<4> <3>
IICA0EN SAU1EN
<2> 1
SAU0EN 0
<0>
TAU0EN
377