Instructions And Addressing Modes; Table 2.2 Combinations Of Instructions And Addressing Modes (1) - Renesas H8SX/1500 Series Hardware Manual

Section 2 CPU
2.7.1

Instructions and Addressing Modes

Table 2.2 indicates the combinations of instructions and addressing modes that the H8SX CPU can
use.
Table 2.2 Combinations of Instructions and Addressing Modes (1)
Classifi-
cation Instruction
Data transfer MOV
MOVFPE,
12
MOVTPE*
POP, PUSH
LDM, STM
4
MOVA*
Block EEPMOV
transfer
MOVMD
MOVSD
Arithmetic ADD, CMP
operations
SUB
ADDX, SUBX
INC, DEC
ADDS, SUBS
DAA, DAS
Rev. 3.00 Mar. 14, 2006 Page 38 of 804
REJ09B0104-0300
Size #xx Rn @ERn
B/W/L S SD SD
B S/D
B S/D
W/L S/D
L S/D
B/W S S
B
B/W/L
B
B S D D
B S D
B D S
B SD
W/L S SD SD
B S D
B S D
B D S
B SD
W/L S SD SD
B/W/L S SD
B/W/L S SD
B/W/L S
B/W/L D
L D
B D
Addressing Mode
@(d, @−ERn/
RnL.B/ @ERn+/
Rn.W/ @ERn−/
@(d,ERn) ERn.L) @+ERn
SD SD SD
2
S/D*
2
S/D*
S S S
D D D
D D D
S S S
SD SD SD
SD SD SD
D D D
D D D
S S S
SD SD SD
SD SD SD
5
SD*
@aa:16/

@aa:8 @aa:32
SD
S/D
1
S/D*
S
3
SD*
3
SD*
3
SD*
D D
D D
S S
SD
SD
D D
D D
S S
SD
SD