Irq Status Registers (Isr16, Isr) - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
Table of Contents

Advertisement

Section 5 Interrupt Controller
5.3.6

IRQ Status Registers (ISR16, ISR)

The ISR registers are flag registers that indicate the status of IRQ15 to IRQ0 interrupt requests.
ISR16
Bit
Bit Name
7
IRQ15F
6
IRQ14F
5
IRQ13F
4
IRQ12F
3
IRQ11F
2
IRQ10F
1
IRQ9F
0
IRQ8F
ISR
Bit
Bit Name
7
IRQ7F
6
IRQ6F
5
IRQ5F
4
IRQ4F
3
IRQ3F
2
IRQ2F
1
IRQ1F
0
IRQ0F
* ExIRQn stands for ExIRQ7 to ExIRQ2.
Note:
Rev. 3.00 Jan 25, 2006 page 82 of 872
REJ09B0286-0300
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
[Setting condition]
When the interrupt source selected by the ISCR
registers occurs
[Clearing conditions]
When reading IRQnF flag when IRQnF = 1,
then writing 0 to IRQnF flag
When interrupt exception handling is
executed when low-level detection is set
and IRQn or ExIRQn input is high
(n = 15 to 8)
When IRQn interrupt exception handling is
executed when falling-edge, rising-edge, or
both-edge detection is set
Description
[Setting condition]
When the interrupt source selected by the ISCR
registers occurs
[Clearing conditions]
When reading IRQnF flag when IRQnF = 1,
then writing 0 to IRQnF flag
When interrupt exception handling is
executed when low-level detection is set
and IRQn or ExIRQn * input is high
(n = 7 to 0)
When IRQn interrupt exception handling is
executed when falling-edge, rising-edge, or
both-edge detection is set
(n = 7 to 0)

Advertisement

Table of Contents
loading

Table of Contents