Appendix D Pin States - Renesas H8S Series Hardware Manual

D.1 Port States in Each Mode
Table D-1 I/O Port States in Each Processing State
MCU
Port Name Operating
Pin Name Mode
Port 1 4 to 7
Port 2 4 to 7
Port 3 4 to 7
P4 /DA1 4 to 7
7
P4 /DA0 4 to 7
6
P4 to P4 4 to 7
5 0
Port 5 4 to 7
P6 to P6 4 to 7
5 2
P6 /CS7 7
7
P6 /CS6
6 4 to 6
P6 /CS5
1
P6 /CS4
0
PA /A 4, 5
7 23
PA /A
6 22
PA /A
5 21
6
7
PA /A 4, 5
4 20
PA /A
3 19
PA /A
2 18
PA /A
1 17
PA /A
0 16
6
7

Appendix D Pin States

Power- Hardware
On Manual Standby
2
Reset Reset* Mode
T kept T
T kept T
T kept T
T T T
T T T
T T T
T kept T
T kept T
T kept T
T kept T
T kept T
T kept T
T kept T
L kept T
T kept T
T kept T
Software Bus
Standby Release
Mode State
kept kept
kept kept
kept kept
[DAOE1 = 1] kept
kept
[DAOE1 = 0]
T
[DAOE0 = 1] kept
kept
[DAOE0 = 0]
T
T T
kept kept
kept kept
kept kept
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
H
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
kept
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
kept
kept kept
[OPE = 0] T
T
[OPE = 1]
kept
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
kept
kept kept
Rev.6.00 Oct.28.2004 page 1007 of 1016
Program
Execution
State
Sleep Mode
I/O port
I/O port
I/O port
I/O port
I/O port
Input port
I/O port
I/O port
I/O port
[DDR = 0]
Input port
[DDR = 1]
CS7 to CS4
[DDR = 0]
Input port
[DDR = 1]
Address
output
[DDR = 0]
Input port
[DDR = 1]
Address
output
I/O port
Address
output
[DDR = 0]
Input port
[DDR = 1]
Address
output
I/O port
REJ09B0138-0600H