Operation Of A/D Converter (In Repeat Mode) - Renesas M16C Series User Manual

M30245 Group

2.9.4 Operation of A/D Converter (in repeat mode)

In repeat mode, choose functions from those listed in Table 2.9.4. Operations of the circled items are
described below. Figure 2.9.8 shows timing chart, and Figure 2.9.9 shows the set-up procedure.
Table 2.9.4. Choosed functions
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Operation
φAD
A/D conversion
start flag
AD register i
A/D conversion
Figure 2.9.8. Operation timing of repeat mode
Rev.2.00 Oct 16, 2006
REJ09B0340-0200
Item
Operation clock
Divided-by-4 f
φ
O
AD
by-3 f
Resolution O 8-bit / 10-bit
Analog input pin O One of AN
Trigger for starting
O
Software trigger
A/D conversion
Trigger by AD
Sample & Hold Not activated
O Activated
(1) Setting the A/D conversion start flag to "1" causes the A/D converter to start operating.
(2) After the first conversion is completed, the content of the successive comparison register
(conversion result) is transmitted to AD register i. The A/D conversion interrupt request bit
does not go to "1".
(3) The A/D converter continues operating until the A/D conversion start flag is set to "0" by
software. The conversion result is transmitted to AD register i every time a conversion is
completed.
( 1 ) S t a r t A / D c o n v e r s i o n
8 - b i t r e s o l u t i o n : 2 8
1 0 - b i t r e s o l u t i o n : 3 3
S e t t o " 1 " b y s o f t w a r e
" 1 "
" 0 "
S t o p C o n v e r t
N o t e : W h e n
φA D
f r e q u e n c y i s l e s s t h a n 1 M H z , s a m p l e a n d h o l d f u n c t i o n c a n n o t b e s e l e c t e d .
C o n v e r s i o n r a t e p e r a n a l o g i n p u t p i n i s 4 9
f o r 1 0 - b i t r e s o l u t i o n .
page 222 of 354
Set-up
/ divided-
AD
/ divided-by-2 f / f
AD AD AD
pin to AN pin
0 7
TRG
(2) Conversion result is transferred to the AD register
φA D
c y c l e s 8-bit resolution : 28
φA D
c y c l e s 10-bit resolution : 33
Cleared to "0" by software
Result
φA D
c y c l e s f o r 8 - b i t r e s o l u t i o n a n d 5 9
2. A/D Converter
( 3 ) A / D c o n v e r s i o n
φAD
cycles
i s c o m p l e t e
φAD
cycles
Result
C o n v e r t Stop
C o n v e r t
φA D
c y c l e s