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2
Section 17 I
C Bus Interface (IIC)
SDA
A
SCL
9
1
BC2 to BC0
0
7
IRIC
(operation
example)
IRIC flag clear available
Figure 17.28 IRIC Flag Clear Timing on WAIT Operation
16. Notes on Arbitration Lost
2
The I
C bus interface recognizes the data in transmit/receive frame as an address when
arbitration is lost in master mode and a transition to slave receive mode is automatically
carried out.
When arbitration is lost not in the first frame but in the second frame or subsequent frame,
transmit/receive data that is not an address is compared with the value set in the SAR or SARX
register as an address. If the receive data matches with the address in the SAR or SARX
2
register, the I
C bus interface erroneously recognizes that the address call has occurred. (See
figure 17.29.)
In multi-master mode, a bus conflict could happen. When The I
master mode, check the state of the AL bit in the ICSR register every time after one frame of
data has been transmitted or received.
When arbitration is lost during transmitting the second frame or subsequent frame, take
avoidance measures.
Rev. 3.00 Jan 25, 2006 page 550 of 872
REJ09B0286-0300
Transmit/receive data
2
3
4
5
6
6
5
4
3
IRIC flag clear unavailable
A
SCL =
7
8
'L' confirm
2
1
0
IRIC clear
IRIC flag clear available
2
C bus interface is operated in
Transmit/receive
data
9
1
2
3
7
6
5
When BC2-0 ≥ 2
IRIC clear
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