Pwm Register Select (Pwsl) - Renesas H8S/2158 User Manual

Section 10 8-Bit PWM Timer (PWM)
10.3.1

PWM Register Select (PWSL)

PWSL is used to select the input clock and the PWM data register.
Bit Bit Name Initial Value
7 PWCKE 0
6 PWCKS 0
5 — 1
4 — 0
Rev. 3.00 Jan 25, 2006 page 264 of 872
REJ09B0286-0300
R/W Description
R/W PWM Clock Enable
R/W PWM Clock Select
These bits, together with bits PWCKB and PWCKA in
PCSR, select the internal clock input to TCNT in the
PWM. For details, see table 10.2.
The resolution, PWM conversion period, and carrier
frequency depend on the selected internal clock, and
can be obtained from the following equations.
Resolution (minimum pulse width) = 1/internal clock
frequency
PWM conversion period = resolution × 256
Carrier frequency = 16/PWM conversion period
With a 20-MHz system clock (φ), the resolution, PWM
conversion period, and carrier frequency are as shown
in table 10.3.
R Reserved
This bit is always read as 1 and cannot be modified.
R Reserved
This bit is always read as 0 and cannot be modified.