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Section 12 16-Bit Free-Running Timer (FRT)
Bit
Bit Name
Initial Value
4
OCRS
0
3
OEA
0
2
OEB
0
1
OLVLA
0
0
OLVLB
0
Rev. 3.00 Jan 25, 2006 page 298 of 872
REJ09B0286-0300
R/W
Description
R/W
Output Compare Register Select
OCRA and OCRB share the same address. When this
address is accessed, the OCRS bit selects which
register is accessed. The operation of OCRA or OCRB
is not affected.
0: OCRA is selected
1: OCRB is selected
R/W
Output Enable A
Enables or disables output of the output compare A
output pin (FTOA).
0: Output compare A output is disabled
1: Output compare A output is enabled
R/W
Output Enable B
Enables or disables output of the output compare B
output pin (FTOB).
0: Output compare B output is disabled
1: Output compare B output is enabled
R/W
Output Level A
Selects the level to be output at the output compare A
output pin (FTOA) in response to compare-match A
(signal indicating a match between the FRC and OCRA
values). When the OCRAMS bit is 1, this bit is ignored.
0: 0 is output at compare-match A
1: 1 is output at compare-match A
R/W
Output Level B
Selects the level to be output at the output compare B
output pin (FTOB) in response to compare-match B
(signal indicating a match between the FRC and OCRB
values).
0: 0 is output at compare-match B
1: 1 is output at compare-match B
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