Renesas H8S/2158 User Manual page 448

Section 16 Serial Communication Interface (SCI, IrDA, and CRC)
Bit Bit Name
2 MP
1 CKS1
0 CKS0
Bit Functions in Smart Card Interface Mode (When SMIF in SCMR = 1)
Bit Bit Name
7 GM
6 BLK
5 PE
Rev. 3.00 Jan 25, 2006 page 394 of 872
REJ09B0286-0300
Initial Value R/W
0 R/W
0 R/W
0 R/W
Initial Value R/W
0 R/W
0 R/W
0 R/W
Description
Multiprocessor Mode (enabled only in asynchronous
mode)
When this bit is set to 1, the multiprocessor
communication function is enabled. The PE bit and
O/E bit settings are invalid in multiprocessor mode.
Clock Select 1,0
These bits select the clock source for the baud rate
generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relation between the bit rate register setting
and the baud rate, see section 16.3.9, Bit Rate
Register (BRR). n is the decimal display of the value
of n in BRR (see section 16.3.9, Bit Rate Register
(BRR)).
Description
GS Mode
Setting this bit to 1 allows GSM mode operation. In
GSM mode, the TEND set timing is put forward to
11.0 etu from the start and the clock output control
function is appended. For details, see section
16.7.8, Clock Output Control.
Setting this bit to 1 allows block transfer mode
operation. For details, see section 16.7.3, Block
Transfer Mode.
Parity Enable (valid only in asynchronous mode)
When this bit is set to 1, the parity bit is added to
transmit data before transmission, and the parity bit
is checked in reception. Set this bit to 1 in smart
card interface mode.