Rfu Manipulation By Mcif; Figure 8.10 Rfu Interface Of Mcif - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Section 8 RAM-FIFO Unit (RFU)
8.8.5

RFU Manipulation by MCIF

Figure 8.10 is a block diagram of the RFU interface in the MCIF. The MCIF can use the RFU for
data transmission and reception.
Figure 8.11 shows the operational flow for transmission. When the transmitted data is written to
the RFU, and start of transmission is triggered (the DATAEN bit in OPCR is set), the MCIF issues
a data transfer request to the RFU.
Figure 8.12 shows the operational flow for reception.
Multimedia card
Multimedia card bus
(Max. 20 Mbps)
This LSI
MCIF
Data transmission/reception control
Transmit data
Receive data
(Max. 20 MHz)
(Max. 20 MHz)
RFU interface
Transmit buffer
Receive buffer
(1byte)
(1byte)
Read data
Write data
Internal data bus
RFU
On-chip RAM

Figure 8.10 RFU Interface of MCIF

Rev. 3.00 Jan 25, 2006 page 200 of 872
REJ09B0286-0300

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