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Section 11 14-Bit PWM Timer (PWMX)
11.2
Input/Output Pins
Table 11.1 lists the PWM (D/A) module input and output pins.
Table 11.1 Pin Configuration
Name
PWM output pin X0
PWM output pin X1
11.3
Register Descriptions
The PWM (D/A) module has the following registers. The PWM (D/A) registers are assigned to the
same addresses with other registers. The registers are selected by the IICE bit in the serial timer
control register (STCR). To access PCSR, the FLSHE bit in STCR must be cleared to 0. For
details on STCR, see section 3.2.3, Serial Timer Control Register (STCR).
• PWM (D/A) counter H (DACNTH)
• PWM (D/A) counter L (DACNTL)
• PWM (D/A) data register AH (DADRAH)
• PWM (D/A) data register AL (DADRAL)
• PWM (D/A) data register BH (DADRBH)
• PWM (D/A) data register BL (DADRBL)
• PWM (D/A) control register (DACR)
• Peripheral clock select register (PCSR)
Note: The same addresses are shared by DADRA and DACR, and by DADRB and DACNT.
Switching is performed by the REGS bit in DACNT or DADRB.
Rev. 3.00 Jan 25, 2006 page 274 of 872
REJ09B0286-0300
Abbreviation
I/O
PWX0
Output
PWX1
Output
Function
PWM output of PWMX channel A
PWM output of PWMX channel B
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