Section 9 I/O Ports
9.3.1
Port 3 Data Direction Register (P3DDR)
The individual bits of P3DDR specify input or output for the pins of port 3.
Bit
Bit Name
7
P37DDR
6
P36DDR
5
P35DDR
4
P34DDR
3
P33DDR
2
P32DDR
1
P31DDR
0
P30DDR
9.3.2
Port 3 Data Register (P3DR)
P3DR stores output data for the port 3 pins.
Bit
Bit Name
7
P37DR
6
P36DR
5
P35DR
4
P34DR
3
P33DR
2
P32DR
1
P31DR
0
P30DR
Rev. 3.00 Jan 25, 2006 page 216 of 872
REJ09B0286-0300
Initial Value
R/W
0
W
0
W
0
W
0
W
0
W
0
W
0
W
0
W
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
In extended mode:
The port functions as the data bus regardless of
the values in these bits.
In single-chip mode:
The corresponding port 3 pins are output ports
when the P3DDR bits are set to 1, and input ports
when cleared to 0.
Description
In extended mode:
If a port 3 read is performed while the P3DDR bits
are set to 1, the P3DR values are read. When the
P3DDR bits are cleared to 0, 1 is read.
In single-chip mode:
P3DR stores output data for the port 3 pins that
are used as the general output port.
If a port 3 read is performed while the P3DDR bits
are set to 1, the P3DR values are read. If a port 3
read is performed while the P3DDR bits are
cleared to 0, the pin states are read.