Table of Contents
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21.5 Usage Notes ...................................................................................................................... 695
22.1 Features ............................................................................................................................. 697
22.2 Input/Output Pins .............................................................................................................. 699
22.3 Register Descriptions ........................................................................................................ 700
22.3.1 A/D Data Registers A to D (ADDRA to ADDRD).............................................. 700
22.3.2 A/D Control/Status Register (ADCSR) ............................................................... 701
22.3.3 A/D Control Register (ADCR) ............................................................................ 702
22.3.4 Keyboard Comparator Control Register (KBCOMP) .......................................... 703
22.4 DTC Comparator Scan...................................................................................................... 704
22.5 Operation........................................................................................................................... 705
22.5.1 Single Mode......................................................................................................... 705
22.5.2 Scan Mode ........................................................................................................... 706
22.5.3 Input Sampling and A/D Conversion Time.......................................................... 706
22.5.4 External Trigger Input Timing ............................................................................. 708
22.6 Interrupt Source................................................................................................................. 708
22.7 A/D Conversion Accuracy Definitions ............................................................................. 709
22.8 Usage Notes ...................................................................................................................... 711
22.8.1 Permissible Signal Source Impedance ................................................................. 711
22.8.2 Influences on Absolute Accuracy ........................................................................ 711
22.8.3 Setting Range of Analog Power Supply and Other Pins ...................................... 712
22.8.4 Notes on Board Design ........................................................................................ 712
22.8.5 Notes on Noise Countermeasures ........................................................................ 712
24.1 Features ............................................................................................................................. 717
24.2 Mode Transition Diagrams ............................................................................................... 718
24.3 Block Configuration.......................................................................................................... 722
24.4 Input/Output Pins .............................................................................................................. 723
24.5 Register Descriptions ........................................................................................................ 723
24.5.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 723
24.5.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 725
24.5.3 Erase Block Registers 1 and 2 (EBR1, EBR2) .................................................... 725
24.6 Operating Modes............................................................................................................... 727
24.7 On-Board Programming Modes ........................................................................................ 727
24.7.1 Boot Mode ........................................................................................................... 728
24.7.2 User Program Mode............................................................................................. 732
24.8 Flash Memory Programming/Erasing ............................................................................... 732
................................................................................................. 697
.................................................................................................................. 715
.................................................................................................................. 717
Rev. 3.00 Jan 25, 2006 page xxxi of lii
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