Bit
Bit Name Initial Value
5
OVF
0
4
—
1
3
OS3
0
2
OS2
0
1
OS1
0
0
OS0
0
Note:
* Only 0 can be written, for flag clearing.
R/W
Description
R/(W) * Timer Overflow Flag
[Setting condition]
•
When TCNT_1 overflows from H'FF to H'00
[Clearing condition]
•
Read OVF when OVF = 1, then write 0 in OVF
R
Reserved
This bit is always read as 1 and cannot be modified.
R/W
Output Select 3, 2
R/W
These bits specify how the TMO1 pin output level is to
be changed by compare-match B of TCORB_1 and
TCNT_1.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
R/W
Output Select 1, 0
R/W
These bits specify how the TMO1 pin output level is to
be changed by compare-match A of TCORA_1 and
TCNT_1.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
Section 13 8-Bit Timer (TMR)
Rev. 3.00 Jan 25, 2006 page 325 of 872
REJ09B0286-0300