Operation; Pulse Output; Figure 12.2 Example Of Pulse Output - Renesas H8S/2158 User Manual

12.4

Operation

12.4.1

Pulse Output

Figure 12.2 shows an example of 50%-duty pulses output with an arbitrary phase difference.
When a compare match occurs while the CCLRA bit in TCSR is set to 1, the OLVLA and
OLVLB bits are inverted by software.
H'FFFF
OCRA
OCRB
H'0000
FTOA
FTOB
FRC

Figure 12.2 Example of Pulse Output

Section 12 16-Bit Free-Running Timer (FRT)
Counter clear
Rev. 3.00 Jan 25, 2006 page 299 of 872
REJ09B0286-0300