Operation Timing - Renesas F-ZTAT H8 Series Hardware Manual

15.3

Operation Timing

Figures 15.1 to 15.8 show timing diagrams.
X1
Figure 15.5 UD Pin Minimum Transition Width Timing
V
IH
OSC
1
V
IL
t
CPH
t
CPr
Figure 15.1 System Clock Input Timing
V
IH
V
IL
t
XH
t
Xr
Figure 15.2 Subclock Input Timing
RES
Figure 15.3 RES Pin Low Width Timing
IRQ to IRQ
V
,
IH
0 4
WKP to WKP
V
,
IL
0 7
ADTRG,
TMIB, TMIC,
TMIF
Figure 15.4 Input Timing
UD
V
15. Electrical Characteristics (H8/3857 Group)
t
OSC
t
CPL
t
CPf
t
XL
t
Xf
V
IL
t
REL
t t
IL IH
V
IH
IL
t t
UDL UDH
Rev.3.00 Jul. 19, 2007 page 419 of 532
REJ09B0397-0300