Table of Contents
Advertisement
2
Section 17 I
C Bus Interface (IIC)
17.3.12 IIC Data Shift Register (ICDRS)
ICDRS is an 8-bit read-only register, which is ICDR's readable shift register (ICDRS).
During transfer operation, the ICDRS values change in accordance with the frame bit count. The
ICDRS values can be associated with the BBC3 to BBC0 bits in ICCNT by simultaneously
reading from ICDRS and ICCNT in words. The ICDRS values read when the BBC3 to BBC0 bits
are set to B'1111 match the receive data.
When receive data is to be read with the SCL clock stopped while the ACK/NACK bit is to be
selected after reading receive data, read from ICDRS using the above method.
17.3.13 IIC Operation Reservation Adapter Count Register (ICCNT)
ICCNT controls monitoring of timeout-related operations of the IIC operation reservation adapter.
Timeout Occurrence Condition:
In transmission/reception operation using the IIC operation reservation adapter, a timeout occurs
when the interrupt flag is not set and the SCL pin has not changed for a period exceeding the time
specified by the CNTS1 and CNTS0 bits. When a timeout occurs, the TOVR and CERR flags in
ICSRB are set to 1 and a command request interrupt (CREQ) request occurs.
Timeout Counter Clear Conditions:
• At a reset
• When ICXE = 0 in ICCRX (IIC operation reservation adapter disabled)
• When CNTE = 0 (timeout counter stopped)
• When BBSYX = 0 in ICCRX (bus released state)
• When a bit among CREQ in ICSRB, and MTREQ, MRREQ, STREQ, and SRREQ in ICSRC
is set to 1 (interrupt is requested)
• When a rising edge or falling edge is input to the SCL pin
Rev. 3.00 Jan 25, 2006 page 508 of 872
REJ09B0286-0300
Advertisement
Table of Contents
