Section 4 Exception Handling; Exception Handling Types And Priority; Table 4.1 Exception Types And Priority - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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4.1

Exception Handling Types and Priority

As table 4.1 indicates, exception handling may be caused by a reset, interrupt, direct transition, or
trap instruction. Exception handling is prioritized as shown in table 4.1. If two or more exceptions
occur simultaneously, they are accepted and processed in order of priority.
Table 4.1
Exception Types and Priority
Priority
Exception Type
High
Reset
Interrupt
Direct transition
Trap instruction
Low

Section 4 Exception Handling

Start of Exception Handling
Starts immediately after a low-to-high transition of the RES pin,
or when the watchdog timer overflows.
Starts when execution of the current instruction or exception
handling ends, if an interrupt request has been issued. Interrupt
detection is not performed on completion of ANDC, ORC,
XORC, or LDC instruction execution, or on completion of reset
exception handling.
Starts when a direction transition occurs as the result of SLEEP
instruction execution.
Started by execution of a trap (TRAPA) instruction. Trap
instruction exception handling requests are accepted at all times
in program execution state.
Section 4 Exception Handling
Rev. 3.00 Jan 25, 2006 page 65 of 872
REJ09B0286-0300

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