Reset - Renesas H8S/2158 User Manual

Exception Source
External interrupt KIN7 to KIN0
External interrupt KIN9, KIN8
Reserved for system use
External interrupt WUE15 to WUE8
Internal interrupt *
External interrupt IRQ8
External interrupt IRQ9
External interrupt IRQ10
External interrupt IRQ11
External interrupt IRQ12
External interrupt IRQ13
External interrupt IRQ14
External interrupt IRQ15
Internal interrupt *
Note: * For details on the internal interrupt vector table, see section 5.5, Interrupt Exception
Handling Vector Table.
4.3

Reset

A reset has the highest exception priority. When the RES pin goes low, all processing halts and
this LSI enters the reset. To ensure that this LSI is reset, hold the RES pin low for at least 20 ms at
power-on. To reset the chip during operation, hold the RES pin low for at least 20 states. A reset
initializes the internal state of the CPU and the registers of on-chip peripheral modules. The chip
can also be reset by overflow of the watchdog timer. For details, see section 15, Watchdog Timer
(WDT).
Vector
Number Normal Mode
30 H'003C to H'003D
31 H'003E to H'003F
32 H'0040 to H'0041
33 H'0042 to H'0043
34 H'0044 to H'0045

55 H'006E to H'006F
56 H'0070 to H'0071
57 H'0072 to H'0073
58 H'0074 to H'0075
59 H'0076 to H'0077
60 H'0078 to H'0079
61 H'007A to H'007B
62 H'007C to H'007D
63 H'007E to H'007F
64 H'0080 to H'0081

114 H'00E4 to H'00E5
Rev. 3.00 Jan 25, 2006 page 67 of 872
Section 4 Exception Handling
Vector Address
Advanced Mode
H'000078 to H'00007B
H'00007C to H'00007F
H'000080 to H'000083
H'000084 to H'000087
H'000088 to H'00008B
 
H'0000DC to H'0000DF
H'0000E0 to H'0000E3
H'0000E4 to H'0000E7
H'0000E8 to H'0000EB
H'0000EC to H'0000EF
H'0000F0 to H'0000F3
H'0000F4 to H'0000F7
H'0000F8 to H'0000FB
H'0000FC to H'0000FF
H'000100 to H'000103
 
H'0001C8 to H'0001CB
REJ09B0286-0300