Figure 24.6 On-Chip Ram Area In Boot Mode; Figure 24.7 Id Code Area; Table 24.6 System Clock Frequencies For Which Automatic Adjustment Of Lsi Bit Rate - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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Table 24.6 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate Is
Possible
Host Bit Rate
19200 bps
9600 bps
4800 bps
Note: * The boot programming area cannot be used until the programming control program
transferred to RAM enters execution state. Note that the boot program area in the
RAM retains the boot program after branching to the programming control program.
In boot mode, this LSI checks the contents of the 8-byte ID code area as shown below to confirm
that the programming control program corresponds with this LSI. To originally write a
programming control program to be used in boot mode, the above 8-byte ID code must be added at
the beginning of the program.
H'FF0800
H'FF0808
System Clock Frequency Range of LSI
8 to 25 MHz
5 to 25 MHz
5 to 25 MHz
H'FF0800
ID code area
H'FF0808
Programming control program area
H'FF1FFF
H'FFE080
Reserved area* (2048 bytes)
H'FFE880
Boot program area* (1920 bytes)
H'FFEFFF
H'FFFF00
Boot program area* (128 bytes)
H'FFFF7F

Figure 24.6 On-Chip RAM Area in Boot Mode

40
FE
64
(Product ID)
Instruction codes of the programming control program

Figure 24.7 ID Code Area

(6136 bytes)
66
32
31
Rev. 3.00 Jan 25, 2006 page 731 of 872
Section 24 ROM
35
38
REJ09B0286-0300

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