Serial Interface Control Register (Scicr); Serial Enhanced Mode Register_0 And 2 (Semr_0 And Semr_2) - Renesas H8S/2158 User Manual

Section 16 Serial Communication Interface (SCI, IrDA, and CRC)

16.3.10 Serial Interface Control Register (SCICR)

SCICR controls IrDA operation of SCI_1.
Bit Bit Name Initial Value
7 IrE 0
6 IrCKS2 0
5 IrCKS1 0
4 IrCKS0 0
3, 2 — All 0
1, 0 — All 0

16.3.11 Serial Enhanced Mode Register_0 and 2 (SEMR_0 and SEMR_2)

SEMR_0 and SEMR_2 select the SCI_0 and SCI_2 functions, respectively, and the clock source
in asynchronous mode. The basic clock is automatically specified when the average transfer rate
operation is selected.
Rev. 3.00 Jan 25, 2006 page 412 of 872
REJ09B0286-0300
R/W Description
R/W IrDA Enable
Specifies SCI_1 I/O pins for either normal SCI or
IrDA.
0: TxD1/IrTxD and RxD1/IrRxD pins function as TxD1
and RxD1 pins, respectively
1: TxD1/IrTxD and RxD1/IrRxD pins function as
IrTxD and IrRxD pins, respectively
R/W IrDA Clock Select 2 to 0
R/W
Specifies the high-level width of the clock pulse
R/W
during IrTxD output pulse encoding when the IrDA
function is enabled.
000: B x 3/16 (three sixteenths of the bit rate)
001: φ/2
010: φ /4
011: φ /8
100: φ /16
101: φ /32
110: φ /64
111: φ /128
R/W
Reserved
The initial value should not be changed.
R Reserved
These bits are always read as 0 and cannot be
modified.