Section 5 Interrupt Controller; Features - Renesas H8S/2158 User Manual

16-bit single-chip microcomputer h8s family/h8s/2100 series
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5.1

Features

• Two interrupt control modes
Any of two interrupt control modes can be set by means of the INTM1 and INTM0 bits in the
system control register (SYSCR).
• Priorities settable with ICR
An interrupt control register (ICR) is provided for setting interrupt priorities. Three priority
levels can be set for each module for all interrupts except NMI, KIN, and WUE.
• Independent vector addresses
All interrupt sources are assigned independent vector addresses, making it unnecessary for the
source to be identified in the interrupt handling routine.
• Thirty-five external interrupts
NMI is the highest-priority interrupt, and is accepted at all times. Rising edge or falling edge
detection can be selected for NMI. Falling-edge, rising-edge, or both-edge detection, or level
sensing, can be selected for IRQ15 to IRQ0. An interrupt is requested at the falling edge for
KIN9 to KIN0 and WUE15 to WUE8.
• DTC control
The DTC can be activated by an interrupt request.

Section 5 Interrupt Controller

Section 5 Interrupt Controller
Rev. 3.00 Jan 25, 2006 page 73 of 872
REJ09B0286-0300

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