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Section 13 8-Bit Timer (TMR)
Bit
Bit Name Initial Value R/W
3
OS3
0
2
OS2
0
1
OS1
0
0
OS0
0
Note:
* Only 0 can be written, for flag clearing.
TCSR_1
Bit
Bit Name Initial Value
7
CMFB
0
6
CMFA
0
Rev. 3.00 Jan 25, 2006 page 324 of 872
REJ09B0286-0300
Description
R/W
Output Select 3, 2
R/W
These bits specify how the TMO0 pin output level is to be
changed by compare-match B of TCORB_0 and
TCNT_0.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
R/W
Output Select 1, 0
R/W
These bits specify how the TMO0 pin output level is to be
changed by compare-match A of TCORA_0 and
TCNT_0.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
R/W
Description
R/(W) * Compare-Match Flag B
[Setting condition]
•
When the values of TCNT_1 and TCORB_1 match
[Clearing condition]
•
Read CMFB when CMFB = 1, then write 0 in CMFB
R/(W) * Compare-Match Flag A
[Setting condition]
•
When the values of TCNT_1 and TCORA_1 match
[Clearing condition]
•
Read CMFA when CMFA = 1, then write 0 in CMFA
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